The present invention relates to a dry etching method for a material containing silicon, a method for fabricating a semiconductor device using the dry etching method, and a dry etching apparatus for implementing the dry etching method.
When dry etching is performed with respect to a material containing silicon (hereinafter referred to as the silicon-containing material) in the fabrication of a semiconductor device, a dry etching apparatus having a dual power source such as an inductively coupled plasma etching apparatus (ICP) has been used to miniaturize a semiconductor element and increase the precision thereof. The dry etching apparatus having the dual power source features-separate and controlled application of first electric power (hereinafter referred to as source power) for generating a plasma of a process gas introduced pinto a chamber and adjusting the density of the plasma and second electric power (hereinafter referred to as bias power) for drawing ions (etching species) from the plasma into an object to be etched. The use of the dry etching apparatus having the dual power source provides high-accuracy processing properties. In a typical dry etching apparatus having a dual power source, the source power is applied to a coil or the like provided on an outer wall of the chamber and the bias power is applied to a sample stage provided in the chamber to carry the object to be etched.
The step of forming an isolation in a silicon substrate has conventionally used LOCOS (Local Oxidization of Silicon) for forming the isolation by locally oxidizing the silicon substrate masked with a nitride film. As feature sizes have been reduced increasingly, however, the problem has arisen that the isolation is larger than a desired size, which makes it difficult to provide an active region having a sufficient size. To solve the problem, STI (Shallow Trench Isolation) has been used as a replacement in which an isolation is formed by forming a trench in a silicon substrate, filling an oxide film in the trench, and then planarizing a surface of the silicon substrate including a surface of the oxide film by CMP (Chemical Mechanical Polishing). The foregoing dry etching apparatus having the dual power source is used to form the trench for isolation.
Herein below, a conventional method for fabricating a semiconductor device, specifically a method for forming a trench for isolation by etching a silicon substrate by using the dry etching apparatus having the dual power source will be described with reference to the drawings.
FIGS. 11A to 11D are cross-sectional views illustrating the individual process steps of the conventional method for fabricating a semiconductor device.
First, as shown in FIG. 11A, a first silicon oxide film 81 is formed on a silicon substrate 80 by thermal oxidation, followed by a silicon nitride film 82 formed on the first silicon oxide film 81 by using a film forming method such as CVD (chemical vapor deposition). Then, a resist pattern 83 having openings each corresponding to a region to be formed with an isolation is formed on the silicon nitride film 82 by photolithography.
Next, as shown in FIG. 11B, dry etching is performed with respect to the silicon nitride film 82 and to the first silicon oxide film 81 by using the resist pattern 83 as a mask, thereby patterning each of the silicon nitride film 82 and the first silicon oxide film 81. Thereafter, the resist pattern 83 is removed by ashing and the silicon-substrate 80 is cleaned.
Next, as shown in FIG. 11C, dry etching is performed with respect to the silicon substrate 80 by using the patterned silicon nitride film 82 as a mask, thereby forming trenches 84 for isolation in the silicon substrate 80. A detailed description will be given to the dry etching step shown in FIG. 11C. First, the silicon substrate 80 as an object to be etched is placed in the chamber (not shown) of the dry etching apparatus. Then, the chamber is evacuated till a specified degree of vacuum is reached and a gas required to etch the silicon substrate 80 (hereinafter referred to as a process gas), specifically a mixture of a halogen-containing gas such as Cl2 or HBr and an oxygen gas is introduced into the chamber. Subsequently, a plasma of the process gas is generated by initiating the application of source gas and then ions in the plasma are drawn into the silicon substrate 80 by initiating the application of bias power. As a result, the ions in the plasma and an exposed portion of the silicon substrate 80 react with each other to form a volatile reaction product (such as a compound of silicon and chlorine). At this stage, dry etching is performed with respect to the silicon substrate 80, by evacuating the chamber and thereby exhausting the foregoing volatile reaction product from the chamber. Thereafter, the silicon substrate 80 is cleaned such that a deposit (such as a compound of the foregoing volatile reaction product and oxygen) formed on the silicon substrate 80-during dry etching is removed therefrom, whereby the trenches 84 are formed in the silicon substrate 80.
Since the dry etching step shown in FIG. 11C requires processing accuracy as high as required by the processing of a gate electrode due to a reduced size of the isolation, a dry etching apparatus having a dual power source such as an inductively coupled plasma etching apparatus is used in the dry etching step.
Next, the portions of the silicon substrate 80 located adjacent the wall and bottom surfaces of the trench 84 are thermally oxidized by using an oxidation furnace in order to lower a surface state in the portions of the silicon substrate 80. Then, a second silicon oxide film 85 is deposited on the silicon nitride film 82 by CVD to completely fill the trench 84. Subsequently, a surface of the silicon nitride film 82 including a surface of the second silicon oxide film 85 is planarized by CMP such that the portions of the second silicon oxide film 85 located externally of the trenches 84 are removed. Thereafter, the silicon nitride film 82 is removed by wet etching and the first silicon oxide film 81 remaining on the surface of the silicon substrate 80 is removed by cleaning the silicon substrate 80 as shown in FIG. 1D, whereby isolations composed of the second silicon oxide film 85 filled in the trenches 84 are formed.
A description will be given herein below to a conventional method of applying the source power and the bias power in the dry etching step using the dry etching apparatus having the dual power source and shown in FIG. 11c (hereinafter referred to as the conventional dry etching method) and to the effect of the conventional dry etching method.
FIG. 12 shows an example of the respective time-varying effective values of the source power and the bias power in the conventional dry etching method. In FIG. 12, the time at which the application of the source power is initiated is used as the reference for power application time (0 second). In the present specification, the effective value of the bias power is the effective value of the bias power actually applied to the sample stage and the effective value of the source power is the effective value of the source power actually applied to the coil or the like. The effective value is defined herein as the value of an alternating power equal to the square root of the arithmetic mean of the squares of the instantaneous values taken throughout one complete cycle.
As shown in FIG. 12, the application of the bias power is initiated one second after the application of the source power is initiated. On the other hand, the effective value of the source power is set to 600 W, while the effective value of the bias power is set to 200 W.
FIGS. 13A to 13C are views showing the effect of the conventional dry etching method, specifically showing changes in the internal state of the chamber of the dry etching apparatus in the dry etching step shown in FIG. 1C, of which FIG. 11A shows the state immediately after the introduction of the process gas into the chamber, FIG. 11B shows the state immediately after the application of the source power is initiated, and FIG. 11C shows the state immediately after the application of the bias power is initiated. It is to be noted that the silicon nitride film and the like on the silicon substrate as well as the sample stage and the like in the chamber are not depicted in FIGS. 13A to 13C.
First, as shown in FIG. 13A, the silicon substrate 80 as an object to be etched is placed in a chamber 86 of the dry etching apparatus. Then, the chamber 86 is evacuated till a specified degree of vacuum is reached and a process gas 87 required to etch the silicon substrate 80 is introduced into the chamber 86. Then, as shown in FIG. 13B, a plasma 87A of the process gas 87 is generated with application of the source gas. Thereafter, ions 88 in the plasma 87A are drawn into the silicon substrate 80 with application of the bias power, as shown in FIG. 13C.
Thus, the dry etching apparatus having the dual power source is capable of controlling the generation of the plasma of the process gas and the adjustment of the plasma density independently of the drawing of the ions from the plasma into the object to be etched. In accordance with the conventional dry etching method using the dry etching apparatus having the dual power source, therefore, etching is performed with respect to the object to be etched by generating the plasma of the process gas with application of the source power and then drawing the ions from the plasma into the object to be etched with application of the bias power.
If a trench for isolation is formed in a silicon substrate by using the conventional dry etching method, e.g., however, etching is halted halfway, as shown in FIG. 14, which leads to the problem that the trench for isolation having a desired isolation depth cannot be formed. FIG. 14 shows the state in which etching has been halted halfway in the dry etching step shown in FIG. 11C. In FIG. 14, the same reference numerals as used in FIG. 11C are retained for the same members.
If the conventional dry etching method is used for a silicon substrate or the like as an object to be etched, an etching-induced damaged layer is formed in the silicon substrate or the like, which causes the problem that the electric characteristics of the semiconductor device are degraded.
If a trench for isolation is formed in a silicon substrate by using the conventional dry etching method, e.g., it is necessary to thermally oxide the portions of the silicon substrate located adjacent the wall and bottom surfaces of the trench for isolation in order to lower a surface state in the portions of the silicon substrate, while cost for fabricating the semiconductor device is increased disadvantageously by using an oxidation furnace.